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白沙县戊冰门厅家具发展招商中心-首页

今天我们要介绍的时序概念是设计约束文件SDC. 全称Synopsys design constraints. SDC是一个设计中至关重要的一个文件。它对电路的时序，面积，功耗进行约束，它是设计的命脉，决定了芯片是否满足设计要求的规范。Timing工程师在release sdc时必须非常小心，一个错误的false path或者case constant就有可能导致整块芯片不工作。